More Engineering News: Protein Engineering and Next-Generation Computer Architecture

Here are two new articles I’ve written about exciting newly published research on protein engineering and computer systems, led by engineers at Stanford University:

 

Stanford engineers invent process to accelerate protein evolution

A new tool enables researchers to test millions of mutated proteins in a matter of hours or days, speeding the search for new medicines, industrial enzymes and biosensors.

All living things require proteins, members of a vast family of molecules that nature “makes to order” according to the blueprints in DNA.

Through the natural process of evolution, DNA mutations generate new or more effective proteins. Humans have found so many alternative uses for these molecules – as foods, industrial enzymes, anti-cancer drugs – that scientists are eager to better understand how to engineer protein variants designed for specific uses.

Now Stanford engineers have invented a technique to dramatically accelerate protein evolution for this purpose. This technology, described in Nature Chemical Biology, allows researchers to test millions of variants of a given protein, choose the best for some task and determine the DNA sequence that creates this variant.

An overview of the directed evolution process with μSCALE: preparing protein libraries, screening them, extracting desired cells, and then inferring the DNA sequence at work. (Credit: Cochran Lab, Stanford)

An overview of the directed evolution process with μSCALE: preparing protein libraries, screening them, extracting desired cells, and then inferring the DNA sequence at work. (Credit: Cochran Lab, Stanford)

“Evolution, the survival of the fittest, takes place over a span of thousands of years, but we can now direct proteins to evolve in hours or days,” said Jennifer Cochran, an associate professor of bioengineering who co-authored the paper with Thomas Baer, executive director of the Stanford Photonics Research Center.

“This is a practical, versatile system with broad applications that researchers will find easy to use,” Baer said.

By combining Cochran’s protein engineering know-how with Baer’s expertise in laser-based instrumentation, the team created a tool that can test millions of protein variants in a matter of hours.

“The demonstrations are impressive and I look forward to seeing this technology more widely adopted,” said Frances Arnold, a professor of chemical engineering at Caltech who was not affiliated with the study.

[For more, check out the entire article in Stanford News, published on 7 Dec. 2015. Thanks to Tom Abate for help with editing.]

 

Stanford-led skyscraper-style chip design boosts electronic performance by factor of a thousand

In modern computer systems, processor and memory chips are laid out like single-story structures in a suburb. But suburban layouts waste time and energy. A new skyscraper-like design, based on materials more advanced than silicon, provides the next computing platform.

For decades, engineers have designed computer systems with processors and memory chips laid out like single-story structures in a suburb. Wires connect these chips like streets, carrying digital traffic between the processors that compute data and the memory chips that store it.

But suburban-style layouts create long commutes and regular traffic jams in electronic circuits, wasting time and energy.

That is why researchers from three other universities are working with Stanford engineers, including Associate Professor Subhasish Mitra and Professor H.-S. Philip Wong, to create a revolutionary new high-rise architecture for computing.

A multi-campus team led by Stanford engineers Subhasish Mitra and H.-S. Philip Wong has developed a revolutionary high-rise architecture for computing.

A multi-campus team led by Stanford engineers Subhasish Mitra and H.-S. Philip Wong has developed a revolutionary high-rise architecture for computing.

In Rebooting Computing, a special issue of the IEEE Computer journal, the team describes its new approach as Nano-Engineered Computing Systems Technology, or N3XT.

N3XT will break data bottlenecks by integrating processors and memory like floors in a skyscraper and by connecting these components with millions of “vias,” which play the role of tiny electronic elevators. The N3XT high-rise approach will move more data, much faster, using far less energy, than would be possible using low-rise circuits.

“We have assembled a group of top thinkers and advanced technologies to create a platform that can meet the computing demands of the future,” Mitra said.

Shifting electronics from a low-rise to a high-rise architecture will demand huge investments from industry – and the promise of big payoffs for making the switch.

“When you combine higher speed with lower energy use, N3XT systems outperform conventional approaches by a factor of a thousand,” Wong said.

[For more, check out the entire article in Stanford News, published on 9 Dec. 2015.]

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